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91400 rm (im) sk no.6746-1/22 ver.1.04 73196 preliminary overview the lc86e6449 is a cmos 8-bit single chip microcontroller with uveprom for the lc866400 series. this microcontroller has the function and the pin description of the lc866400 series mask rom version, and 48k-byte eprom. the program data is rewritable. it is suitable to develop the program. features (1) option switching by eprom data the option function of the lc866400 series can be specified by the eprom data. lc86e6449 can be checked the function of the trial pieces using the mass production board. (2) internal one-time eprom capacity : 49408 bytes (3) internal ram capacity : 1152 bytes used eprom or ram capacity are equal rom or ram capacity of mask rom version which applies lc86e6449. mask rom version eprom capacity ram capacity lc866448 49152 bytes 1152 bytes lc866444 45056 bytes 1152 bytes lc866440 40960 bytes 1152 bytes lc866436 36864 bytes 1152 bytes lc866432 32768 bytes 768 bytes lc866428 28672 bytes 768 bytes lc866424 24576 bytes 768 bytes lc866420 20480 bytes 640 bytes lc866416 16384 bytes 640 bytes lc866412 12288 bytes 512 bytes LC866408 8192 bytes 512 bytes 8-bit single chip microcontroller with the uveprom lc86e6449 ordering number : enn*6746 cmos ic
lc86e6449 no.6746-2/22 (4) operating supply voltage : 4.5v to 6.0v (5) instruction cycle time : 1.0 s to 366 s (6) operating temperature : +10 c to +40 c (7) the pin compatible with the lc866400 series mask rom devices (8) applicable mask rom version : lc866448/lc866444/lc866440/lc866436//lc866432/lc866428 /lc866424/lc866420/lc866416/lc866412/LC866408 (9) operating temperature : qfc80e (with window) notice for use lc86e6449 is provided for the first release and small shipping of the lc866400 series. at using, take notice of the followings. (1) a point of difference lc86e6449 and lc866400 series item lc86e6449 lc866448/44/40/36/32/28/24/20/16/12/08 operation after reset releasing the option is specified until 3ms after going to a ?h? level to the reset terminal by dgrees. the program is executed from 00h of the program counter. the program is executed from 00h of the program counter immediately after going to a ?h? level to reset terminal. pull-down resistor of the following pins s0/t0 ? s6/t6 s7/t7 ? s15/t15 s16 ? s27 s28 ? s37 pull-down resistor provided/not provided not provided provided (fixed) provided (fixed) not provided pull-down resistor provided/not provided specified by the option provided (fixed) specified by the option specified by the option operating supply voltage range (vdd) 4.5v to 6.0v 2.5v to 6.0v operating temperature range (topg) +10 c to +40 c -30 c to +70 c ?l? level hold tr. of the high voltage withstand input terminal power dissipation refer to ?electrical characteristics? on the semiconductor news. lc86e6449 uses 256 bytes that is addressed on ff00h to ffffh in the program memory as the option configuration data area. this option configuration cannot execute all options which lc866400 series have. next tables show the options that correspond and not correspond to lc86e6449.
lc86e6449 no.6746-3/22 a kind of the option corresponding of the lc86e6449 a kind of option pins, circuits contents of the option 1. n-channel open drain output 2. cmos output *1 port 0 1. pull-up mos tr. proveded 2. pull-up mos tr. not provided *2 port 1 *1 1. input : programmable pull-up mos tr. output : n-channel open drain 2. input : programmable pull-up mos tr. output : cmos input/output form of input/output ports port 3 *1 1. input : no programmable pull-up mos tr. output : n-channel open drain 2. input : programmable pull-up mos tr. output : cmos pull-up mos tr. of input ports port 7 *1 1. no pull-up mos tr. 2. pull-up mos tr. *1) specified in a bit *2) specified in nibble unit. the port of n-channel open drain output does not have the pull-up mos tr.. a kind of the option not corresponding of the lc86e6449 a kind of option pins, circuits lc86e6449 lc866448/44/40/36/32/28/24/20/16/12/08 pull-down resistor of the high voltage withstand output terminals s0/t0 to s6/t6 s16 to s27 s28 to s37 not provided provided (fixed) not provided specified by the option specified by the option specified by the option (2) option the option data is created by the option specified program ?su86k.exe?. the created option data is linked to the program area by linkage loader ?l86k.exe?.
lc86e6449 no.6746-4/22 (3) rom space lc86e6449 and lc866400 series use 256 bytes that is addressed on 0ff00h to 0ffffh in the program memory as the option specified data area. these program memory capacity are 61440 bytes that is addressed on 0000h to bfffh. 0ffffh 0ff00h 0efffh 0dfffh 0cfffh 0bfffh 0afffh 9fffh 8fffh 7fffh 6fffh 5fffh 4fffh 3fffh 2fffh 1fffh 0fffh 0000h the option specified area 256 bytes program area 48k bytes lc866448 the option specified area program area 44k bytes lc866444 the option specified area program area 40k bytes lc866440 the option specified area program area 36k bytes lc866436 the option specified area program area 32k bytes lc866432 the option specified area program area 28k bytes lc866428 0ffffh 0ff00h 0efffh 0dfffh 0cfffh 0bfffh 0afffh 9fffh 8fffh 7fffh 6fffh 5fffh 4fffh 3fffh 2fffh 1fffh 0fffh 0000h the option specified area program area 24k bytes lc866424 the option specified area program area 20k bytes lc866420 the option specified area program area 16k bytes lc866416 the option specified area program area 12k bytes lc866412 the option specified area program area 8k bytes LC866408
lc86e6449 no.6746-5/22 how to use (1) specification of option programming data for eprom of the lc86e6449 is required. debugged evaluation file (eva file) must be converted to an intel-hex formatted file (hex file) with file converter program, eva2hex.exe. the hex file is used as the programming data for the lc86e6449. (2) how to program for the eprom lc86e6449 can be programmed by the eprom programmer with attachment ; w86ep6448q. recommended eprom programmer productor eeprom programmer advantest r4945, r4944, r4943 andou af-9704 aval pkw-1100, pkw-3000 minato electronics model 1890a ?27512 (vpp=12.5v) intel high speed programming? mode available. the address must be set to ?0 to 0ffffh? and a jumper (dasec) must be set to ?off? at programming . (3) how to use the data security function ?data security? is the disabled function to read the data of the eprom. the following is the process in order to execute the data security. 1. set ?on? the jumper of attachment. 2. program again. then eprom programmer displays the error. the error means normally activity of the data security. it is not a trouble of the eprom programmer or the lsi. notes data security is not executed when the data of all address have ?ffh? at the sequence 2 above. the programming by a sequential operation ?blank ? program ? verify? cannot be executed data security at the sequence 2 above. set to ?off? the jumper after executing the data security. w86ep6448q data security 1 pin 1 pin mark of lsi not data security
lc86e6449 no.6746-6/22 (4) how to eliminate the programming data can be erased by using the eprom eraser. (5) shielding the uveprom (ultraviolet erasable programmable rom) is in it. put the seal on the window in use. pin assignment sanyo: qfc80e s15/t15 s14/t14 s13/t13 s12/t12 s11/t11 s10/t10 s9/t9 s8/t8 s7/t7 s6/t6 s5/t5 s4/t4 s3/t3 s2/t2 s1/t1 s0/t0 s37/pe5 s36/pe4 s35/pe3 s34/pe2 s33/pe1 s32/pe0 s31/pd7 s30/pd6 s29/pd5 s28/pd4 s27/pd3 s26/pd2 s25/pd1 s24/pd0 s23/pc7 s22/pc6 s21/pc5 s20/pc4 s19/pc3 s18/pc2 s17/pc1 s16/pc0 vp vdd2 p17/pwm0 p30 p31 p32 p33 p70/int0 res xt1/ p74 xt2/p75 vss1 cf1 cf2 vdd1 p80/an0 p81/an1 p82/an2 p83/an3 p84/an4 p85/an5 p86/an6 p87/an7 p71/int1 p72/int2/t0in p73/int3/t0in p00 p01 p02 p03 p04 p05 p06 p07 vss2 p10/so0 p11/si0/sb0 p12/sck0 p13/so1 p14/si1/sb1 p15/sck1 p16/buz 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
lc86e6449 no.6746-7/22 system block diagram interrupt control stand-by control clock generator cf rc x?tal ir pla eprom control a15-a0 d7-d0 ta ce oe dasec eprom(48kb) pc acc b register c register alu psw rar ram stack pointer port 0 watchdog timer bus interface port 1 port 3 port 7 port 8 base timer sio0 sio1 timer 0 timer 1 adc int0 to 3 noise filter real time service high voltage output ram 128 bytes vfd controller
lc86e6449 no.6746-8/22 lc86e6449 pin description pin name i/o function description option eprom mode vss1,2 - power pin (-) - - vdd1,2 - power pin (+) *4 refer to notes - - vp - power pin (-) for the vfd output pull-down resist - - port0 p00 to p07 i/o 8-bit input/output port input for port 0 interrupt input/output in nibble units input for hold release 15v withstand at n-channel open drain output pull-up resistor : provided/not provided output form : cmos/n-channel open drain - port1 p10 to p17 i/o 8-bit input/output port input/output can be specified in a bit unit other pin functions p10 sio0 data output p11 sio0 data input/bus input/output p12 sio0 clock input/output p13 sio1 data output p14 sio1 data input/bus input/output p15 sio1 clock input/output p16 buzzer output p17 timer 1 output (pwm0 output) output form : cmos/n-channel open drain data line d0 to d7 port3 p30 to p33 i/o 4-bit input/output port input/output can be specified 15v withstand at n-channel open drain output output form : cmos/n-channel open drain - 6-bit input port other functions p70 : int0 input/hold release input/ n-ch tr. output for watchdog timer p71 : int1 input/hold release input p72 : int2 input/timer 0 event input p73 : int3 input with noise rejection filter/timer 0 event input p74 : xt1 terminal for 32.768khz crystal oscillation p75 : xt2 terminal for 32.768khz crystal oscillation interrupt received forms, the vector addresses pull-up resistor : provided/not provided (p70,71,72,73) * p74 ,p75 don?t have pull-up resistor option. rising falling rising & falling high level low level vector int0 enable enable disable enable enable 03h int1 enable enable disable enable enable 0bh int2 enable enable enable disable disable 13h port7 p70 p71 to p75 i/o i int3 enable enable enable disable disable 1bh eprom control signals dasec (*1) oe (*2) ?be (*3) continue. ce
lc86e6449 no.6746-9/22 pin name i/o function description option eprom mode port8 p80 to 87 i 8-bit input port other function ad input port (8 port pins) - - s0/t0 to s6/t6 *6 o output for vfd display controller segment/timing in common - - s7/t7 to s15/t15 *7 o output for vfd display controller segment/timing with internal pull-down resistor in common - ta (*5) s16 to s31 *8 i/o output for vfd display controller segment output other function s16 : high voltage input port pc0 s17 : high voltage input port pc1 s18 : high voltage input port pc2 s19 : high voltage input port pc3 s20 : high voltage input port pc4 s21 : high voltage input port pc5 s22 : high voltage input port pc6 s23 : high voltage input port pc7 s24 : high voltage input port pd0 s25 : high voltage input port pd1 s26 : high voltage input port pd2 s27 : high voltage input port pd3 s28 : high voltage input port pd4 s29 : high voltage input port pd5 s30 : high voltage input port pd6 s31 : high voltage input port pd7 - address input a15 to a0 eprom control signal input s32 to s37 *9 i/o output for vfd display controller segment other function s32 : high voltage i/o port pe0 s33 : high voltage i/o port pe1 s34 : high voltage i/o port pe2 s35 : high voltage i/o port pe3 s36 : high voltage i/o port pe4 s37 : high voltage i/o port pe5 - - res i reset pin - - xt1/ p74 i input pin for 32.768khz crystal oscillation other function xt1 : input port p74 in case of non use, connect to vdd1. - - xt2/p75 o output pin for 32.768khz crystal oscillation other function xt2 : input port p75 in case of non use, connect to vdd1 at using as port or unconnect at using as oscillation. - -
lc86e6449 no.6746-10/22 pin name i/o function description option eprom mode cf1 i input pin for the ceramic resonator oscillation - - cf2 o output pin for the ceramic resonator oscillation - - ? all of port options except the pull-up resistor option of port 0 can be specified in a bit unit. *1 memory select input for data security *2 output enable input *3 chip enable input *4 connect like the following figure to reduce noise into a vdd1 terminal. *5 ta ! eprom control signal input *6 s0/t0 to s6/t6 : not provided the pull-down resistor *7 s7/t7 to s15/t15 : provided the pull-down resistor (fixed) *8 s16 to s27 : provided the pull-down resistor (fixed) *9 s28 to s31 : not provided the pull-down resistor *10 s32 to s37 : not provided the pull-down resistor [notes] when connecting to the power supply, the power pins must be connected like following figure. for the lc866448b/44b/40b/36b for the lc866432a/28a/24a/20a/16a/12a/08a power supply vdd1 vdd2 (vfd power pin) vss1 vss2 lsi for back-up power supply vdd1 vdd2 (vfd power pin) vss1 vss2 lsi for back-up
lc86e6449 no.6746-11/22 1. absolute maximum ratings at vss1=vss2=0v and ta=25 c ratings parameter symbol pins conditions v dd [v] min. typ. max. unit supply voltage vddmax vdd1, vdd2 vdd1=vdd2 -0.3 +7.0 vi(1) ports 71,72,73, 74 ,75,8 res -0.3 vdd+0.3 input voltage vi(2) vp vdd-45 vdd+0.3 output voltage vo(1) s0/t0 to s15/t15 vdd-45 vdd+0.3 vio(1) port 1 port 70 ports 0, 3 of cmos output -0.3 vdd+0.3 vio(2) ports 0, 3 of open drain output -0.3 15 input/output voltage vio(3) s16 to s37 vdd-45 vdd+0.3 v ioph(1) ports 0, 1, 3 cmos output at each pins -10 ioph(2) s0/t0 to s15/t15 at each pins -30 peak output current ioph(3) s16 to s37 at each pins -15 ioah(1) ports 0,1,3 the total of all pins -30 ioah(2) s0/t0 to s15/t15 the total of all pins -55 high level output current total output current ioah(3) s16 to s37 the total of all pins -115 iopl(1) ports 0,1,3 at each pins 20 peak output current iopl(2) port 70 at each pins 15 ioal(1) port 0 the total of all pins 40 low level output current total output current ioal(2) ports 1,3 the total of all pins 40 ma maximum power dissipation pdmax qfc80e ta=+10 to+40 c 480 mw operating temperature range topr +10 +40 storage temperature range tstg -55 +125 c
lc86e6449 no.6746-12/22 2. recommended operating range at ta=+10 c to +40 c, vss1=vss2=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit operating supply voltage vdd(1) vdd1=vdd2 98 s t cyc t cyc 400 s 4.5 6.0 hold voltage vhd vdd1=vdd2 rams and the registers hold voltage at hold mode. 2.0 6.0 pull-down voltage vp vp 4.5 to 6.0 -35 vdd vih(1) port 0 at cmos output output disable 4.5 to 6.0 0.33vdd +1.0 vdd vih(2) port 0 at open drain output output disable 4.5 to 6.0 0.75vdd 13.5 vih(3) port 1 ports 72,73 port 3 at cmos output output disable 4.5 to 6.0 0.75vdd vdd vih(4) port 3 at open drain output output disable 4.5 to 6.0 0.75vdd 13.5 vih(5) port 70 port input/interrupt port 71 res output n-channel tr. off 4.5 to 6.0 0.75vdd vdd vih(6) port 70 watchdog timer output n-channel tr. off 4.5 to 6.0 0.9vdd vdd vih(7) port 8 ports 74 ,75 using as port 4.5 to 6.0 0.75vdd vdd input high voltage vih(8) s16 to s37 output p-channel tr. off 4.5 to 6.0 0. 33vdd +1.0 vdd vil(1) port 0 at cmos output option output disable 4.5 to 6.0 vss 0.2vdd vil(2) port 0 at open drain output output disable 4.5 to 6.0 vss 0.25vdd vil(3) ports 1,3 ports 72,73 output disable 4.5 to 6.0 vss 0.25vdd vil(4) port 70 port input/interrupt port 71 res output n-channel tr. off 4.5 to 6.0 vss 0.25vdd vil(5) port 70 watchdog timer output n-channel tr. off 4.5 to 6.0 vss 0. 8vdd -1.0 vil(6) port 8 ports 74 ,75 using as port 4.5 to 6.0 vss 0.25vdd input low voltage vil(7) s16 to s37 output p-channel tr. off 4.5 to 6.0 vp 0.2vdd v operation cycle time t cyc 4.5 to 6.0 0.98 400 s fmcf(1) cf1, cf2 6mhz (ceramic resonator oscillation) refer to figure 1 4.5 to 6.0 6 fmcf(2) cf1, cf2 3mhz (ceramic resonator oscillation) refer to figure 1 4.5 to 6.0 3 fmrc rc oscillation 4.5 to 6.0 0.3 0.8 3.0 mhz oscillation frequency range (note 1) fsxtal xt1, xt2 32.768khz (crystal oscillation) refer to figure 2 4.5 to 6.0 32.768 khz continue.
lc86e6449 no.6746-13/22 ratings parameter symbol pins conditions vdd[v] min. typ. max. unit tmscf(1) cf1, cf2 6mhz (ceramic resonator oscillation) refer to figure 3 4.5 to 6.0 tmscf(2) cf1, cf2 3mhz (ceramic resonator oscillation) refer to figure 3 4.5 to 6.0 ms oscillation stabilizing time period (note 1) tssxtal xt1, xt2 32.768khz (crystal oscillation) refer to figure 3 4.5 to 6.0 s (note 1) the oscillation constant is shown on table 1 and table 2.
lc86e6449 no.6746-14/22 3. electrical characteristics at ta=+10 c to +40 c, vss1=vss2=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit iih(1) ports 0,3 at open drain output output disable vin=13.5v (including off-leakage current of output tr.) 4.5 to 6.0 5 iih(2) ports 1,3 port 0 without pull-up mos tr. output disable pull-up mos tr. off. vin=vdd (including off-leakage current of output tr.) 4.5 to 6.0 1 iih(3) ports 70,71,72,73 without pull-up mos tr. port 8 vin=vdd 4.5 to 6.0 1 iih(4) res vin=vdd 4.5 to 6.0 1 iih(5) ports 74 ,75 using as port vin=vdd 4.5 to 6.0 1 input high current iih(6) s28 to s37 output disable vin=vdd 4.5 to 6.0 1 iil(1) ports 1,3 port 0 without pull-up mos tr. output disable pull-up mos tr. off. vin=vss (including off-leakage current of output tr.) 4.5 to 6.0 -1 iil(2) ports 70,71,72,73 without pull-up mos tr. port 8 vin=vss 4.5 to 6.0 -1 iil(3) res vin=vss 4.5 to 6.0 -1 input low current iil(4) ports 74 ,75 using as port vin=vss 4.5 to 6.0 -1 a voh(1) ioh=-1.0ma 4.5 to 6.0 vdd-1 voh(2) ports 0,1,3 of cmos output ioh=-0.1ma 4.5 to 6.0 vdd-0.5 voh(3) ioh=-20ma 4.5 to 6.0 vdd-1.8 voh(4) s0/t0 to s15/t15 ioh=-1.0ma the current of these each pins is not over 1ma. 4.5 to 6.0 vdd-1 voh(5) ioh=-5ma 4.5 to 6.0 vdd-1.8 output high voltage voh(6) s16 to s37 ioh=-1.0ma the current of these each pins is not over 1ma. 4.5 to 6.0 vdd-1 vol(1) iol=10ma 4.5 to 6.0 1.5 vol(2) iol=1.6ma 4.5 to 6.0 0.4 vol(3) ports 0,1,3 iol=1ma the current of these each pins is not over 1ma. 4.5 to 6.0 0.4 output low voltage vol(4) port 70 iol=1ma 4.5 to 6.0 0.4 v pull-up mos tr. resistor rpu ports 0,1,3 ports 70,71,72,73 voh=0.9vdd 4.5 to 6.0 15 40 70 k ? continue.
lc86e6449 no.6746-15/22 ratings parameter symbol pins conditions vdd[v] min. typ. max. unit ioff(1) output p-channel tr. off vout=vss 4.5 to 6.0 -1 output off- leakage current ioff(2) s0/t0 to s6/t6 s28 to s37 (without pull-down resistor) output p-channel tr. off vout=vdd-40v 4.5 to 6.0 -30 a ?l? level hold tr. of high voltage withstand input rinpd s16 to s37 output p-channel tr. off 4.5 to 6.0 400 k ? pull-down transistor resistor rpd s7/t7 to s15/t15 s16 to s27 (without pull-down resistor) output p-channel tr. off vout=3v vp=-30v 5.0 60 100 200 k ? hysteresis voltage vhis port 1 ports 70,71,72,73 res output disable 4.5 to 6.0 0.1vdd v pin capacitance cp all pins f=1mhz vin=vss for all unmeasured terminals. ta=25 c 4.5 to 6.0 10 pf 4. serial input/output characteristics at ta=+10 c to +40 c, vss1=vss2=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit cycle t ckcy (1) 2 low level pulse width t ckl (1) 1 input clock high level pulse width t ckh (1) sck0,sck1 refer to figure 5 4.5 to 6.0 1 cycle t ckcy (2) 2 low level pulse width t ckl (2) 1/2t ckcy serial clock output clock high level pulse width t ckh (2) sck0,sck1 use pull-up resistor (1k ? ) in the open drain output. refer to figure 5 4.5 to 6.0 1/2t ckcy t cyc data set-up time t ick 0.1 serial input data hold time t cki si0,si1 sb0,sb1 data set-up to sck0,1 data hold from sck0,1 refer to figure 5 4.5 to 6.0 0.1 output delay time (external clock using for serial transfer clock) t cko(1) 7/12 t cyc +0.2 serial output output delay time (internal clock using for serial transfer clock) t cko(2) so0,so1 sb0,sb1 use pull-up resistor (1k ? ) in the open drain output. data hold from sck0,1 refer to figure 5 4.5 to 6.0 1/3 t cyc +0.2 s
lc86e6449 no.6746-16/22 5. pulse input conditions at ta=+10 c to +40 c, vss1=vss2=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit tpih(1) tpil(1) int0, int1 int2/t0in interrupt acceptable timer0-countable 4.5 to 6.0 1 tpih(2) tpil(2) int3/t0in (the noise rejection clock selected to 1/1.) interrupt acceptable timer0-countable 4.5 to 6.0 2 tpih(3) tpil(3) int3/t0in (the noise rejection clock selected to 1/16.) interrupt acceptable timer0-countable 4.5 to 6.0 32 tpih(4) tpil(4) int3/t0in (the noise rejection clock selected to 1/64.) interrupt acceptable timer0-countable 4.5 to 6.0 128 t cyc high/low level pulse width tpil(5) res reset acceptable 4.5 to 6.0 200 s 6. ad converter characteristics at ta=+10 c to + 40 c, vss1=vss2=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit resolution n 4.5 to 6.0 8 bit absolute precision (note 2) et 4.5 to 6.0 1.5 lsb ad conversion time = 16 tcyc (adcr2=0) (note 3) 15.68 (tcyc= 0.98 s) 65.28 (tcyc= 4.08 s) conversion time tcad ad conversion time = 32 tcyc (adcr2=1) (note 3) 4.5 to 6.0 31.36 (tcyc= 0.98 s) 130.56 (tcyc= 4.08 s) s analog input voltage range vain 4.5 to 6.0 vss vdd v iainh vain=vdd 4.5 to 6.0 1 analog port input current iainl an0 to an7 vain=vss 4.5 to 6.0 -1 a (note 2) absolute precision excepts the quantizing error (1/2 lsb). (note 3) the conversion time means the time from executing the ad conversion instruction to setting the complete digital conversion value to the register.
lc86e6449 no.6746-17/22 7. current dissipation characteristics at ta=+10 c to +40 c, vss1=vss2=0v ratings parameter symbol pins conditions vdd[v] min. typ. max. unit iddop(1) fmcf=6mhz ceramic resonator oscillation fsxtal=32.768khz crystal oscillation system clock : cf oscillation internal rc oscillation stops 1/1 divided 4.5 to 6.0 14 33 iddop(2) fmcf=3mhz ceramic resonator oscillation fsxtal=32.768khz crystal oscillation system clock : cf oscillation internal rc oscillation stops 1/2 divided 4.5 to 6.0 6 18 iddop(3) fmcf=0hz (the oscillation stops) fsxtal=32.768khz crystal oscillation system clock : rc oscillation 1/2 divided 4.5 to 6.0 4 13 current dissipation during basic operation (note 4) iddop(4) fmcf=0hz (the oscillation stops) fsxtal=32.768khz crystal oscillation system clock : 32.768khz internal rc oscillation stops 1/2 divided 4.5 to 6.0 3 10 ma continue.
lc86e6449 no.6746-18/22 ratings parameter symbol pins conditions vdd[v] min. typ. max. unit iddhalt(1) halt mode fmcf=6mhz ceramic resonator oscillation fsxtal=32.768khz crystal oscillation system clock : cf oscillation internal rc oscillation stops 1/1 divided 4.5 to 6.0 5 14 iddhalt(2) halt mode fmcf=3mhz ceramic resonator oscillation fsxtal=32.768khz crystal oscillation system clock : cf oscillation internal rc oscillation stops 1/2 divided 4.5 to 6.0 2.2 7 ma iddhalt(3) halt mode fmcf=0hz (the oscillation stops) fsxtal=32.768khz crystal oscillation system clock : rc oscillation 1/2 divided 4.5 to 6.0 400 1600 current dissipation in halt mode (note 4) iddhalt(4) halt mode fmcf=0hz (the oscillation stops) fsxtal=32.768khz crystal oscillation system clock : crystal oscillation internal rc oscillation stops 1/2 divided 4.5 to 6.0 25 100 current dissipation in hold mode (note 4) iddhold(1) hold mode 4.5 to 6.0 0.05 30 a (note 4) the currents of the output transistors and the pull-up mos transistors are ignored.
lc86e6449 no.6746-19/22 table 1. ceramic resonator oscillation recommended constant (main-clock) oscillation type maker oscillator c1 c2 murata on chip 6mhz ceramic resonator oscillation kyocera murata on chip 3mhz ceramic resonator oscillation kyocera * both c1 and c2 must be use k rank (10%) and sl characteristics. table 2. crystal oscillation guaranteed constant (sub-clock) oscillation type maker oscillator c3 c4 rd 32.768khz crystal oscillation * both c3 and c4 must be use j rank (5%) and ch characteristics. (not in need of high precision, use k rank (10%) and sl characteristics.) (notes) please place the oscillation-related parts as close to the oscillation pins as possible with the shortest possible pattern length since the circuit pattern affects the oscillation frequency. if you use other oscillators herein, we provide no guarantee for the characteristics. figure 1 main-clock circuit figure 2 sub-clock circuit ceramic resonator oscillation crystal oscillation cf1 cf2 c2 c1 cf rd xt1 xt2 c4 c3 x?tal
lc86e6449 no.6746-20/22 figure 3 oscillation stable time figure 4 reset circuit (note) fix the value of c res , r res that is sure to reset until 200 s, after power supply has been over inferior limit of supply voltage. operation mode xt1, xt2 cf1, cf2 internal rc resonator oscillation res instruction execution mode instruction execution mode i nstruct i on execution mode ocr6=1 reset valid unfixed tssxtal tmscf reset time vdd vdd limit 0v power supply operation mode xt1, xt2 cf1, cf2 internal rc resonator oscillation hold release signal hold tssxtal tmscf c res r res vdd res
lc86e6449 no.6746-21/22 figure 5 serial input / output test condition figure 6 pulse input timing condition 0.5vdd vdd 1k ? 50pf tckcy tckl tckh tick tcki tcko sck0 sck1 si0 si1 so0, so1 sb0 , sb1 tpil tpih
lc86e6449 no.6746-22/22 memo: ps

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